Paper Topic:

Reconfigurable Logic Devices Technologies

s

1 . Introduction : 3

2 . Application Specific Integrated Circuit (ASIC : 4-8

3 . Programmable Logic Devices (PLD : 9-10

4 . Field Programmable Gate Array (FPGA :11-13

5 . Programmable Gate Array (PGA :14-17

6 . Programmable Logic Array (PLA :18-19

7 . Programmable Array Logic (PAL :20-21

8 . Generic Array Logic (GAL :22-23

9 . Simple Programmable Logic Devices (SPLD :24-25

10 . Complex Programmable Logic Devices (CPLD :26-27

11 . Field-Programmable Interconnect Chips (FPIC : 28

12 . Programmable Logic Sequence (PLS :29-30

13 . Bibliography :31-32

VLSI is a technology used for designing ICs . ICs

are circuits fabricated on a single chip of silicon . The ICs are internally composed of transistors . The size of an IC is measured by the number of gates or Lamda half the size of a smallest transistor . The equivalent for a basic gate is a 2 input NAND gate . For example , a 100k gate IC contains an equivalent of 100 ,000 NAND gates . One of the evolving fields in VLSI is analog VLSI wherein ICs are designed to replace analog circuits . The process of designing a VLSI chip is given by the ASIC design flow . The design of digital circuits is specified by schematic entry or using a Hardware Language (HDL . Different provide their own HDLs for designing VLSI chips . Two of the commercially available HDLs are VHDL and Verilog

Re-programmability is achieved by using the vast variety of commercially available VLSI chips . The different types of VLSI chips and their along with their schematics are listed below

They are chips that are tailor made to suit a specific application They are broadly classified into Full custom and Semi custom ASICs

Full-Custom ASICs

In this design , the designer abandons the idea of using predesigned cells and there are no existing cell libraries available . Some (possibly all ) logic cells and

all mask layers are customized (Smith , 1997 : 5 (Weste and Eshraghian , 2000

Semicustom ASICs

In this design , all logic cells are predesigned (defined in cell library ) and some (possibly all ) of the mask layers are customized . Semi custom ASIC may be classified as Standard-cell based and Gate-array-based ASICs (Smith , 1997 : 6

Standard Cell based ASICs

It uses predesigned logic cells known as standard cells . They are arranged in rows . Some larger predesigned cells known as megacells can be used along with the standard cells (Smith , 1997 : 6 (Smith , 1997 (Smith , 1997

Gate Array based ASICs

In gate-array-based ASIC , transistors are predefined on the silicon wafer .The Base cell is the smallest element that is replicated . The base array consists of predefined pattern of transistors . They are also known as Masked Gate Array (MGA . In this type only layers which define the interconnect between transistors are defined by the designer using custom masks . Designer chooses from a gate-array library predesigned and precharacterized logic cells (often called macros . Since only metal interconnections are unique for MGA , we can use prefabricated wafers (with completed transistor layers (Smith , 1997 : 11

Channeled gate array

There is space between the rows of transistors for wiring . Here only the interconnect...

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